Half-rate clock and data recovery circuit

A half-rate clock and data recovery (CDR) circuit comprising:

• a phase detector which is capable of operating at a half rate;
• a charge pump circuit;
• a low-pass filter;
• and
• a voltage controlled oscillator;
• the phase detector comprising:
• a first latch circuit which receives an input signal, an inverted input signal and a half-rate clock so as to output a first output signal and an inverted first output signal;
• a second latch circuit which receives the first output signal and the inverted first output signal from the first latch circuit and an inverted half-rate clock so as to output a second output signal and an inverted second output signal;
• a further first latch circuit which receives the input signal, the inverted input signal and the inverted half-rate clock so as to output a further first output signal and an inverted further first output signal;
• a further second latch circuit which receives the further first output signal and the inverted further first output signal form the further first latch circuit and the half-rate clock so as to output a further second output signal and an inverted further second output signal;
• a selector circuit which receives the first output signal and the inverted first output signal form the first latch circuit and the further first output signal and the inverted further first output signal from the further first latch circuit, the half-rate clock and the inverted half-rate clock so as to output a retimed signal and an inverted retimed signal;
• and
• an exclusive OR circuit which receives the second output signal and the inverted second output signal from the second latch circuit and the further second output signal and the inverted further second output signal from the further second latch circuit so as to output a reference signal and an inverted reference signal.