Interpolated timing recovery system for communication transceivers

A transceiver comprising:

• a source of a first clock signal having edges that are periodic with a first frequency;
• first means for masking a portion of the edges of the first clock signal to produce a second clock signal (CLK2R) and for generating a periodic third clock signal of a second frequency lower than the first frequency, wherein the second frequency is substantially equal to a time-average frequency of occurrence of edges of the second clock signal;
• second means for receiving and storing elements of a first data sequence (Tx,a) at a rate controlled by the third clock signal (CLK3L) and for reading out elements of the first data sequence at a rate controlled by the second clock signal;
• third means for processing the first data sequence read out of the third means to generate elements of a second data sequence (T3x,a) at a rate controlled by a first clock signal (CLK1L), wherein the second data sequence is an encoded version of the first data sequence;
• fourth means for generating a first analog signal (A1) having successive magnitudes controlled by the second data sequence;
• fifth means for receiving and processing a second analog signal having successive magnitudes representing a third data sequence to generate elements of a fourth data sequence (R3x,a) at a rate controlled by the first clock signal (CLK1L);
• sixth means for processing the fourth data sequence (R3x,a) to generate elements of a fifth data sequence (R1x,a) at a rate controlled by the second clock signal (CLK3L);
• and
• seventh means for receiving and storing elements of the fifth data sequence at a rate controlled by the second clock signal and for reading out elements of the fifth data sequence at a rate controlled by the third clock signal.