Hole driver in semiconductor memory device

Abstract

A hole driver for driving a hole in a semiconductor memory device, including a first bank controller for generating a control signal for controlling a X-hole of a first bank in response to a row active signal and a precharge signal for the first bank, a second bank controller for generating a control signal for controlling a X-hole of a second bank in response to a row active signal and a precharge signal for the second bank, a block address enable means for generating a common block address enable signal in response to output signals of the first and the second bank control means and a common block address predecoder for predecoding block address signal for each bank in response to the common block address enable signal.

Dependencies are inferred from the claim text.