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US 2003/0142563 A1Published application
Semiconductor memory device and electronic information device using the same
AssigneeSharp Kabushiki Kaisha
InventorKaname Yamano
Life of this patent
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Abstract
In a semiconductor memory device, a redundant memory cell is accessible based on an input address signal by a redundant word line selection signal which is output in accordance with whether data read is to be performed or a memory operation other than data read is to be performed.
Claims12
A semiconductor memory device, wherein a redundant memory cell is accessible based on an input address signal by a redundant word line selection signal which is output in accordance with whether data read is to be performed or a memory operation other than data read is to be performed.
A semiconductor memory device, comprising:
- a regular word line selection circuit for accessing a regular memory cell based on an input address signal;
- and
- a redundant word line selection circuit for accessing a redundant memory cell based on the input address signal and a defective address signal,
- wherein the redundant word line selection circuit outputs a redundant word line selection signal in accordance with the type of memory operation so as to access the redundant memory cell.
1 more element
Dependencies are inferred from the claim text.