Magnetoresistive memory cell with polarity-dependent resistance
AssigneeInfineon Technologies AG
InventorFranz Kreupl
Life of this patent
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Abstract
A magnetoresistive tunnel element includes first and second electrodes and a tunnel barrier disposed between the two electrodes, the tunnel barrier having at least two barrier layers made of different barrier materials, the profile of a quantum mechanical barrier height within the tunnel barrier being asymmetrical and the conductivity of the tunnel element, therefore, being dependent on the polarity of a voltage Um between the two electrodes. Also provided is a magnetoresistive memory cell, a cell array of magnetoresistive memory cells, and a memory device having cell arrays.
Claims23
A magnetoresistive tunnel element, comprising:
- a first electrode;
- a second electrode;
- a tunnel barrier having a quantum mechanical barrier height therewithin, said tunnel barrier being disposed between said first and second electrodes and defining:
- a first interface between said tunnel barrier and said first electrode;
- and
- a second interface between said tunnel barrier and said second electrode;
- and
- said tunnel barrier including said first and second interfaces defining a profile of said quantum mechanical barrier height within said tunnel barrier, said profile being asymmetrical with regard to a barrier symmetry area equidistant from said first and second interfaces;
- and
- said tunnel barrier and said first and second electrodes defining a tunnel element having an electrical conductivity dependent upon a polarity of a measurement voltage Um applied between said first and second electrodes
The configuration according to claim-8, wherein said layer thickness da is equal to said layer thickness db.
A magnetoresistive memory cell, comprising:
- a memory layer defining a first electrode;
- a reference layer defining a second electrode;
- and
- a magnetoresistive tunnel element having:
- a tunnel barrier having a quantum mechanical barrier height therewithin, said tunnel barrier being disposed between said first and second electrodes and defining:
- a first interface between said tunnel barrier and said first electrode;
- and
- a second interface between said tunnel barrier and said second electrode;
- and
- said tunnel barrier including said first and second interfaces defining a profile of said quantum mechanical barrier height within said tunnel barrier, said profile being asymmetrical with regard to a barrier symmetry area equidistant from said first and second interfaces;
- and
- said tunnel barrier and said first and second electrodes defining a tunnel element having an electrical conductivity dependent upon a polarity of a measurement voltage Um applied between said first and second electrodes.
A memory cell array, comprising:
- magnetoresistive memory cells each having:
- a memory layer defining a first electrode;
- a reference layer defining a second electrode;
- and
- a magnetoresistive tunnel element having:
- a tunnel barrier having a quantum mechanical barrier height therewithin, said tunnel barrier being disposed between said first and second electrodes and defining:
- a first interface between said tunnel barrier and said first electrode;
- and
- a second interface between said tunnel barrier and said second electrode;
- and
- said tunnel barrier including said first and second interfaces defining a profile of said quantum mechanical barrier height within said tunnel barrier, said profile being asymmetrical with regard to a barrier symmetry area equidistant from said first and second interfaces;
- and
- said tunnel barrier and said first and second electrodes defining a tunnel element having an electrical conductivity dependent upon a polarity of a measurement voltage Um applied between said first and second electrodes;
- a first interconnect layer having word lines respectively connected to said magnetoresistive memory cells;
- a second interconnect layer having bit lines respectively connected to said magnetoresistive memory cells;
- and
- said magnetoresistive memory cells disposed between said first interconnect layer and said second interconnect layer.
A memory device, comprising:
- memory cell arrays each having:
- magnetoresistive memory cells each having:
- a memory layer defining a first electrode;
- a reference layer defining a second electrode;
- and
- a magnetoresistive tunnel element having:
- a tunnel barrier having a quantum mechanical barrier height therewithin, said tunnel barrier being disposed between said first and second electrodes and defining:
- a first interface between said tunnel barrier and said first electrode;
- and
- a second interface between said tunnel barrier and said second electrode;
- and
- said tunnel barrier including said first and second interfaces defining a profile of said quantum mechanical barrier height within said tunnel barrier, said profile being asymmetrical with regard to a barrier symmetry area equidistant from said first and second interfaces;
- and
- said tunnel barrier and said first and second electrodes defining a tunnel element having an electrical conductivity dependent upon a polarity of a measurement voltage Um applied between said first and second electrodes;
- a first interconnect layer having word lines respectively connected to said magnetoresistive memory cells;
- a second interconnect layer having bit lines respectively connected to said magnetoresistive memory cells;
- and
- said magnetoresistive memory cells disposed between said first interconnect layer and said second interconnect layer;
- and
- said memory cell arrays and said first and second interconnect layers form memory structures stacked one above the other.
A magnetoresistive tunnel element, comprising:
- a first electrode;
- a second electrode;
- a tunnel barrier having a quantum mechanical barrier height therewithin, said tunnel barrier being disposed between said first and second electrodes and defining:
- a first interface between said tunnel barrier and said first electrode;
- and
- a second interface between said tunnel barrier and said second electrode;
- a profile of said quantum mechanical barrier height within said tunnel barrier with inclusion of said first and second interfaces being asymmetrical with regard to a barrier symmetry area equidistant from said first and second interfaces;
- and
- said tunnel barrier and said first and second electrodes defining a tunnel element having an electrical conductivity dependent upon a polarity of a measurement voltage Um applied between said first and second electrodes.
Dependencies are inferred from the claim text.