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US 2003/0142557 A1Published application
Apparatus and method for encoding auto-precharge
AssigneeIntel Corporation
InventorsNarendra S. Khandekar, Michael W. Williams
Life of this patent
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Abstract
A technique to encode a precharge command on a flag signal used to execute data transfer to and from a DRAM.
Claims24
An apparatus comprising:
- a controller to generate command signals to a device to access the device to transfer data between the device and a bus coupled to the device;
- and
- a flag signal generation unit to generate a flag signal to the device to trigger the data transfer between the device and the bus in response to a state transition that occurs in the flag signal after a specified period following a data transfer command, but said flag signal to also initiate a different command than the data transfer command in response to a state transition that occurs in the flag signal within the specified clock period.
An apparatus comprising:
- a memory array to couple to a data bus to transfer data between said memory array and bus in response to a command signal received to initiate the data transfer;
- and
- a timing unit coupled to receive the command signal to initiate the data transfer and also coupled to receive a flag signal to trigger the data transfer, said timing unit to interpret the flag signal to determine if the flag signal has a transition prior to a lapse of a specified clock period following the command signal and to perform a different command operation than data transfer, if the flag signal has a transition prior to the lapse of the specified clock period following the command signal.
A system comprising:
- a controller to generate a data transfer command signal to effect data transfer and also to generate a flag signal to time triggering of the data transfer;
- a memory device coupled to said controller to receive the data transfer command signal and transfer data in response to the data transfer command signal;
- a bus coupled to said memory device to transfer data between said memory and bus in response to the data transfer command signal;
- said controller to generate the flag signal to the memory device to trigger the data transfer between the memory device and the bus in response to a state transition that occurs in the flag signal after a specified clock period following the data transfer command signal, but said flag signal to also initiate a different command signal than the data transfer command signal in response to a state transition that occurs in the flag signal within the specified clock period;
- and
- said memory to receive and interpret the flag signal to determine if the flag signal has a transition within the specified clock period following the command signal and to perform a different command operation from data transfer, in response to a transition present in the specified clock period following the data transfer command signal.
3 more elements
A method comprising:
- issuing a command signal;
- generating a flag signal in response to the issuing of the command signal to trigger a response to a corresponding operation of the command signal after a lapse of a specified time period following the issuing of the command signal;
- and
- coding a different command on the flag signal by having the flag signal transition within the specified time period following the issuing of the command signal to perform a different operation than the corresponding operation of the command signal.
1 more element
Dependencies are inferred from the claim text.