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AssigneeSTMicroelectronics S.r.I.
InventorsRino Micheloni, Ilaria Motta
Estimating the term…
A method and a circuit are for regulating the source terminal voltage of a non-volatile memory cell during the cell programming and/or reading phases. The method includes a phase of locally regulating the voltage value and includes comparing the source current of the cell array with a reference current. A fraction of the source current is converted to a voltage and compared with a voltage generated from a memory cell acting as a reference and being programmed to the distribution with the highest current levels. The comparison may be used for controlling a current generator to inject, into the source terminal, the current necessary to keep the predetermined voltage thereof at a constant value.
A method for regulating the source terminal (S) voltage in a non-volatile memory cell (3) during the cell programming and/or reading phases, characterized in that it comprises:
A circuit (1) for regulating source voltage (Vs), incorporated in an electronic semiconductor-integrated memory device comprising an array of non-volatile memory cells (3) divided into sectors, with each said cell including at least one floating gate transistor having source (S), drain (D), gate (G), and body (B) terminals, said circuit being characterized in that it comprises:
An electronic multi-level memory device of the flash EEPROM type, being monolithically integrated in a semiconductor and comprising an array of non-volatile memory cells (3) divided into sectors, with every said cell including at least one floating gate transistor having source (S), drain (D), gate (G), and body (B) terminals, said device being characterized in that it comprises a set of n source pass transistors connected between the apices of each sector and corresponding ground references, with n being selected according to the number of array cells to be programmed.
Dependencies are inferred from the claim text.