Multiple mask step and scan aligner

An optical lithographic exposure apparatus comprising:

• a wafer stage comprising a means of supporting a semiconductor wafer;
• a mask stage comprising a means of holding a first mask and a second mask and maintaining a fixed relative position between said first mask and said second mask and a means of aligning said first mask and said second mask prior to exposing and stepping;
• a light source comprising a means of selectively shining actinic light through one of said first mask and said second mask;
• an imaging lens capable of focusing said actinic light onto said semiconductor wafer;
• and
• a means of stepping said mask stage across said semiconductor wafer.

A method to pattern a photoresist layer in the manufacture of an integrated circuit device comprising:

• depositing a photoresist layer overlying a wafer;
• loading a first mask and a second mask in a mask stage of an exposure apparatus wherein said mask stage maintains a fixed relative position between said first mask and said second mask;
• aligning said first mask and said second mask;
• indexing said wafer to a starting field to set a current field;
• thereafter scanning said first mask to expose said current field;
• thereafter stepping said wafer to a next field unexposed by said first mask to set a new said current field;
• thereafter repeating said scanning and stepping until every said field on said semiconductor substrate is exposed with said first mask;
• thereafter returning said wafer to said starting field to set said current field;
• thereafter scanning said second mask to expose said current field;
• thereafter stepping said wafer to a next field unexposed by said second mask to set a new said current field;
• thereafter repeating said scanning and stepping until every said field on said semiconductor substrate is exposed with said second mask to thereby superimpose the patterns of said first mask and said second mask in every said field;
• and
• developing said photoresist layer to thereby complete said patterning in the manufacture of said integrated circuit device.

A method to pattern a photoresist layer in the manufacture of an integrated circuit device comprising:

• depositing a photoresist layer overlying a wafer;
• loading a first mask and a second mask in a mask stage of an optical lithographic, stepper wherein said mask stage maintains a fixed relative position between said first mask and said second mask;
• aligning said first mask and said second mask;
• indexing said wafer to a starting field to set a current field;
• thereafter scanning said first mask to expose said current field;
• thereafter scanning said second mask to expose an adjacent field;
• thereafter stepping said wafer to a next field unexposed by said first mask to set a new said current field;
• and
• thereafter repeating said scanning and stepping until every said field on said semiconductor substrate is exposed;
• thereafter returning said wafer to said starting field to set said current field;
• thereafter stepping said wafer to a next field unexposed by said second mask to set a new said current field;
• thereafter scanning said second mask;
• thereafter stepping said wafer to a next field unexposed by said first mask to set a new said current field;
• thereafter scanning said first mask to expose said current field;
• thereafter repeating said scanning and stepping until every said field on said semiconductor substrate is exposed to thereby superimpose the patterns of said first mask and said second mask in every said field;
• and
• developing said photoresist layer to thereby complete said patterning in the manufacture of said integrated circuit device.