FET amplifier with temperature-compensating circuit
AssigneeNEC Corporation
InventorShigeru Amano
Life of this patent
Estimating the term…
Loading patent…
AssigneeNEC Corporation
InventorShigeru Amano
Estimating the term…
A FET amplifier which minimizes the worsening of the distortion-susceptibility due to variations in the ambient temperature of operation is to be provided. An LDMOS FET 1, whose source terminal is grounded and to which are applied a gate voltage Vgs from a gate bias terminal 3 via a temperature-compensating circuit 2 and a choke coil and a drain voltage Vds from a drain bias terminal 4 via a choke coil operates as a source-grounded type amplifier. In the temperature compensating circuit 2, the resistances of fixed resistance elements 21 and 22 connected in parallel are set to be the same or have the same number of digits, and those of thermosensitive resistance elements (thermistors) 23 and 24 are set to be a combination of a value greater by one digit and a value smaller by one digit than that of the fixed resistance element 21 or the fixed resistance element 22 at the standard level (+25° C.) in the ambient temperature range of operation.
A FET amplifier, using a FET as its amplifying element, provided with a temperature-compensating circuit for subjecting the gate voltage of said FET element to temperature compensation, wherein:
Dependencies are inferred from the claim text.