DLL-(Delay-Locked-Loop) circuit

Abstract

The present invention provides a DLL (Delay-Locked Loop) circuit having: a delay device (1) for generating at least one delayed clock signal (7) from an input clock signal (6); a phase detector (2) for comparing the delayed clock signal (7) with the input clock signal (6); a first control device (3, 4) for generating a first control signal (5) for influencing a delay time of the delay device (1); a device (12) for generating a signal Q (Q), whose frequency is proportional to the reciprocal of the delay time (Delay) of the delay device (1); a device (13, 23) for evaluating the signal Q (Q) and generating an output signal (17); and a second control device (15) for modifying the first control signal in accordance with the output signal (17). The present invention likewise provides a method for generating a control signal of a DLL circuit.

Dependencies are inferred from the claim text.