Digital method of measuring driver slew rates for reduced test time

A circuit combination for providing digital signals indicative of slew rates of predrive signals in a motor driver circuit, comprising:

• 1) an integrated circuit chip including:
• a) DMOS power driver transistors connected in an H-bridge configuration having a plurality of high-side drivers and a plurality of low-side drivers for providing drive voltages for connection to respective phases of a polyphase motor;
• b) a plurality of predriver circuiQuickMarkQuickMarkts producing predrive signals according to a commutation sequence connected to gates of respective said DMOS power drive transistors;
• and
• c) a multiplexer connected to selectively direct at least some of said predrive signals to an externally accessible port;
• and
• 2) a digital comparison circuit for receiving said at least some predrive signals and for producing a digital output having a signal state change time in dependence upon rise and fall times of said predrive signals.

A method for providing digital signals indicative of slew rates of predrive signals in a motor driver circuit, comprising:

• 1) proving an integrated circuit chip including:
• a) DMOS power driver transistors connected in an H-bridge configuration having a plurality of high-side drivers and a plurality of low-side drivers for providing drive voltages for connection to respective phases of a polyphase motor;
• b) a plurality of predriver circuits producing predrive signals according to a commutation sequence connected to gates of respective said DMOS power drive transistors;
• and
• c) a multiplexer connected to selectively direct at least some of said predrive signals to an externally accessible port;
• and
• 2) providing a digital comparison circuit for receiving said at least some predrive signals and for producing a digital output having a signal state change time in dependence upon rise and fall times of said predrive signals.