Method for in-line testing of flip-chip semiconductor assemblies

A method for in-line electrical testing of a flip-chip semiconductor assembly during its manufacture, the method comprising:

• providing one or more integrated circuit (IC) dice, each with a surface having interconnection bumps thereon;
• providing a printed circuit board (PCB) with conductive epoxy pads deposited on a surface thereof for flip-chip attachment to the interconnection bumps of the IC dice;
• providing an in-line electrical test socket for connection to the PCB;
• inserting the PCB into the test socket;
• positioning the IC dice on the surface of the PCB with the interconnection bumps of the dice in conductive contact with the epoxy pads of the PCB to form the flip-chip semiconductor assembly;
• attaching the IC dice to the PCB;
• while the PCB is inserted in the test socket and before encapsulation of the IC dice, electrically testing the assembly using the test socket;
• repairing the assembly if it fails the electrical testing;
• and
• encapsulating the IC dice of the assembly.

A method for in-line electrical testing of a flip-chip semiconductor assembly during its manufacture, the method comprising:

• providing one or more integrated circuit (IC) dice, each with a surface having interconnection bumps thereon;
• providing a substrate with conductive quick-cure epoxy pads deposited on a surface thereof for flip-chip attachment to the interconnection bumps of the IC dice;
• providing an in-line electrical test socket for connection to the substrate;
• inserting the substrate into the test socket;
• positioning the IC dice on the surface of the substrate and pressing the interconnection bumps of the dice into conductive contact with the epoxy pads of the substrate to form the flip-chip semiconductor assembly;
• attaching the IC dice to the substrate;
• while the substrate is inserted into the test socket and before sealing of the IC dice, electrically testing the assembly using the test socket;
• repairing the assembly if it fails the electrical testing;
• curing the quick-cure conductive epoxy pads of the substrate;
• and
• sealing the IC dice of the assembly.

A method for electrically testing a flip-chip semiconductor assembly during its manufacture, the assembly being formed from a substrate and one or more integrated circuit (IC) dice, the method comprising:

• connecting the substrate to a test apparatus at a die-attach station;
• bringing the IC dice into a flip-chip-type conductive contact with the substrate while it is connected to the test apparatus at the die-attach station to form the flip-chip semiconductor assembly;
• and
• electrically testing the assembly at the die-attach station using the test apparatus.

A method for electrically testing a flip-chip semiconductor assembly formed from at least one integrated circuit (IC) die and a substrate, the method comprising:

• inserting the substrate into a test socket;
• while the substrate is in the test socket, bringing the at least one die and the substrate together in conductive contact to form the flip-chip semiconductor assembly;
• and
• before the at least one die is sealed, electrically testing the assembly using the test socket.

A method for in situ electrical testing of a flip-chip semiconductor assembly during its manufacture, the method comprising:

• providing one or more integrated circuit (IC) dice, each with a surface having interconnection bumps thereon;
• providing a substrate with conductive pads deposited on a surface thereof for flip-chip attachment to the interconnection bumps of the IC dice;
• providing an in situ electrical test socket for connection to the substrate;
• inserting the substrate into the test socket;
• positioning the IC dice on the surface of the substrate with the interconnection bumps of the dice in conductive contact with the pads of the substrate to form the flip-chip semiconductor assembly;
• while the substrate is inserted into the test socket and the IC dice are positioned on the surface of the substrate, and before sealing of the IC dice, electrically testing the assembly using the test socket;
• repairing the assembly if it fails the electrical testing;
• and
• sealing the IC dice of the assembly.

A method for in situ electrical testing of a flip-chip semiconductor assembly during its manufacture, the method comprising:

• providing one or more integrated circuit (IC) dice, each with a surface having interconnection bumps thereon;
• providing a printed circuit board (PCB) with conductive epoxy pads deposited on a surface thereof for flip-chip attachment to the interconnection bumps of the IC dice;
• providing an in situ electrical test socket for connection to the PCB;
• inserting the PCB into the test socket;
• positioning the IC dice on the surface of the PCB with the interconnection bumps of the dice in conductive contact with the epoxy pads of the PCB to form the flip-chip semiconductor assembly;
• while the PCB is inserted in the test socket and the IC dice are positioned on the surface of the PCB, and before encapsulation of the IC dice, electrically testing the assembly using the test socket;
• repairing the assembly if it fails the electrical testing;
• and
• encapsulating the IC dice of the assembly.

A method for in situ electrical testing of a flip-chip semiconductor assembly during its manufacture, the method comprising:

• providing one or more integrated circuit (IC) dice, each with a surface having interconnection bumps thereon;
• providing a substrate with conductive quick-cure epoxy pads deposited on a surface thereof for flip-chip attachment to the interconnection bumps of the IC dice;
• providing an in situ electrical test socket for connection to the substrate;
• inserting the substrate into the test socket;
• positioning the IC dice on the surface of the substrate and pressing the interconnection bumps of the dice into conductive contact with the epoxy pads of the substrate to form the flip-chip semiconductor assembly;
• while the substrate is inserted into the test socket and the IC dice are positioned on the surface of the substrate, and before sealing of the IC dice, electrically testing the assembly using the test socket;
• repairing the assembly if it fails the electrical testing;
• curing the quick-cure conductive epoxy pads of the substrate;
• and
• sealing the IC dice of the assembly.

A method for in situ electrical testing of a flip-chip semiconductor assembly during its manufacture, the method comprising:

• providing one or more integrated circuit (IC) dice, each with a surface having interconnection bumps thereon;
• providing a substrate with conductive epoxy pads deposited on a surface thereof for flip-chip attachment to the interconnection bumps of the IC dice;
• providing an in situ electrical test socket for connection to the substrate;
• inserting the substrate into the test socket;
• positioning the IC dice on the surface of the substrate with the interconnection bumps of the dice in conductive contact with the epoxy pads of the substrate to form the flip-chip semiconductor assembly;
• curing the conductive epoxy pads of the substrate;
• while the substrate is inserted into the test socket and the IC dice are positioned on the surface of the substrate, and before sealing of the IC dice, electrically testing the assembly using the test socket;
• repairing the assembly if it fails the electrical testing;
• and
• sealing the IC dice of the assembly.