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US 2003/0141877 A1Published application
Broadside compare with retest on fail
AssigneeTexas Instruments Incorporated
InventorsRandy L. Williams, Glenn R. Fitzgerald, Michael K. Henson, Julian I. Gloria, Bruce D. Bishop
Life of this patent
Estimating the term…
Abstract
A tester routine is proved that evaluates all test pins, on all devices under test, t the same time and only if a fail does any evaluation have to be made. In the case of a failing pin that device is retested until passed or if not passed after a specified time considered a fail.
Claims6
A method of testing multiple pins on devices under test comprising the steps of:
- testing multiple pins on said device at the same time;
- and
- retesting only devices with failed pins.
A method of testing multiple pins on multiple devices under test comprising the steps of:
- testing multiple pins on said devices at the same time;
- passing devices were all pin pass;
- and
- retesting only failed devices with failed pins.
1 more element
A method of testing multiple pins on multiple devices under test comprising the steps of:
- making required connections and applying required test conditions to device(s) to be tested;
- waiting the required time to allow all conditions to settle and stabilize;
- testing multiple pins and/or multiple devices at the same time;
- and
- retesting only devices with failed pins.
2 more elements
Dependencies are inferred from the claim text.