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US 2003/0141859 A1Published application
Analog filter with built-in self test
AssigneeIntel Corporation
InventorsSalem Abdennadher, Hassan Ihs
Life of this patent
Estimating the term…
Abstract
An analog filter in an integrated circuit is tested by placing the filter in a feedback loop. The filter is tested by determining whether the analog filter, while in the feedback loop, provides a signal that oscillates within a predetermined tolerance of an expected frequency.
Claims27
A method comprising:
- causing an analog filter in an integrated circuit to be placed in a feedback loop;
- and
- determining whether the analog filter, while in the feedback loop, provides a signal that oscillates within a predetermined tolerance of an expected oscillation frequency.
A method comprising:
- causing an analog filter to be placed in a feedback loop in an integrated circuit;
- determining whether a first signal obtained from the feedback loop oscillates within a predetermined tolerance of a first expected oscillation frequency;
- adjusting a setting of the analog filter;
- adjusting a delay line in the feedback loop to correspond to a second expected oscillation frequency;
- and
- subsequently determining whether a second signal obtained from the feedback loop oscillates within a predetermined tolerance of the second expected oscillation frequency.
3 more elements
An integrated circuit comprising:
- an analog filter;
- delay circuitry;
- and
- switches coupled to the analog filter and delay circuitry to couple the analog filter and delay circuit in a feedback loop in response to a first state of a control signal;
- a processor coupled to the switches to provide a control signal to the switches to couple the analog filter and the delay circuitry in a feedback loop during a test mode;
- and
- a counter that is coupled to an output of the analog filter to provide a signal indicative of whether the feedback loop carries an oscillating signal and indicative of an oscillation frequency if the feedback loop is carrying an oscillating signal.
4 more elements
An integrated circuit comprising:
- an analog filter having adjustable settings;
- delay circuitry having an adjustable delay;
- and
- a multiplexer;
- a processor coupled to the multiplexer to provide a first control signal to the multiplexer to couple the analog filter and the delay circuitry in a feedback loop during a test mode, the processor coupled to the filter to provide a second control signal to select a setting of the filter and coupled to the delay circuitry to provide a third control signal to adjust an amount of delay of the delay circuitry;
- and
- a counter that is coupled to an output of the analog filter during the test mode to provide an output signal indicative of whether the feedback loop carries an oscillating signal and indicative of an oscillation frequency of the signal carried by the feedback loop if the feedback loop carries an oscillating signal,
- the processor coupled to receive the output signal from the counter and to provide a signal indicative of whether the oscillation frequency is within the predetermined tolerance of an expected frequency.
5 more elements
Dependencies are inferred from the claim text.