Providing parallel computing reduction operations
OwnerDavid K. Poulsen, Sanjiv M. Shah +3inventors
InventorsDavid K. Poulsen, Sanjiv M. Shah, Paul M. Petersen, Grant E. Haab, Jay P. Hoeflinger
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Abstract
A method and apparatus for a reduction operation is described. A method may be utilized that includes receiving a first program unit in a parallel computing environment, the first program unit may include a reduction operation to be performed and translating the first program unit into a second program unit, the second program unit may associate the reduction operation with a set of one or more low-level instructions that may, in part, perform the reduction operation.
Claims20
A method comprising:
- receiving a first program unit in a parallel computing environment, the first program unit including a reduction operation associated with a set of variables;
- translating the first program unit into a second program unit, the second program unit to associate the reduction operation with a set of one or more instructions operative to partition the reduction operation between a plurality of threads including at least two threads;
- and
- translating the first program unit into a third program unit, the third program unit to associate the. reduction operation with a set of one or more instructions operative to perform an algebraic operation on the variables.
An apparatus comprising:
- a memory including a shared memory location;
- a translation unit coupled with the memory, the translation unit to translate a first program unit including a reduction operation associated with a set of at least two variables into a second program unit, the second program unit to associate the reduction operation with one or more instructions operative to partition the reduction operation between a plurality of threads including at least two threads;
- a compiler unit coupled with the translation unit and the shared-memory, the compiler unit to compile the second program unit;
- and
- a linker unit coupled with the compiler unit and the shared-memory, the linker unit to link the compiled second program with a library.
A machine-readable medium that provides instructions, that when executed by a set of one or more processors, enable the set of processors to perform operations comprising:
- receiving a first program unit in a parallel computing environment, the first program unit including a reduction operation associated with a set of variables;
- translating the first program unit into a second program unit, the second program unit to associate the reduction operation with a set of one or more instructions operative to partition the reduction operation between a plurality of threads including at least two threads;
- and
- translating the first program unit into a third program unit, the third program unit to associate the reduction operation with a set of one or more instructions operative to perform an algebraic operation on the variables.
Dependencies are inferred from the claim text.