Controlling compatibility levels of binary translations between instruction set architectures

A method comprising:

• receiving a binary of a program code, the binary based on a first instruction set architecture;
• and
• executing the binary, wherein the executing comprises translating at least one instruction of the binary based on the first instruction set architecture to at least one instruction based on a second instruction set architecture.

A system comprising:

• a memory to include a binary of a program code based on a first instruction set architecture;
• and
• a processor coupled to the memory, the processor to execute the binary, wherein executing the binary comprises translating the binary, the translated binary based on a combination of the first instruction set architecture and a second instruction set architecture.

An apparatus comprising:

• a decoder to receive a binary based on a first instruction set architecture;
• and
• a number of registers, wherein at least one of the number of registers is to store instruction set architecture execution flags, the instruction set architecture execution flags to indicate a translation of a binary, the translated binary based on a combination of the first instruction set architecture and a second instruction set architecture.

A machine-readable medium that provides instructions, which when executed by a machine, causes the machine to perform operations comprising:

• receiving a binary of a program code, the binary based on a first instruction set architecture;
• and
• translating the binary, wherein the translated binary is based on a combination of the first instruction set architecture and a second instruction set architecture.