Digital design using selection operations
AssigneeScience and Technology Corporation
InventorsSterling R. Whitaker, Lowell H. Miles, Eric G. Cameron
Life of this patent
Estimating the term…
Abstract
A digital integrated circuit chip is designed by identifying a logical structure to be implemented. This logical structure is represented in terms of a logical operations, at least 5% of which include selection operations. A determination is made of logic cells that correspond to an implementation of these logical operations.
Claims24
A method for designing a digital integrated circuit chip, the method comprising:
- identifying a logical structure to be implemented by the digital integrated circuit chip;
- representing the logical structure in terms of a plurality of logical operations, wherein the plurality of logical operations comprises at least 5% selection operations, each such selection operation passing at least one of a plurality of inputs as an output;
- and
- determining logic cells that correspond to an implemention of the logical operations.
A method for designing a digital integrated circuit chip, the method comprising:
- identifying a logical structure to be implemented by the digital integrated circuit chip;
- representing the logical structure in terms of a plurality of logical operations wherein fewer than 50% of the plurality of logical operations comprise a Boolean logical operation having more than a single input;
- and
- determining logic cells that correspond to an implementation of the logical operations.
A computer-readable storage medium having a computer-readable program embodied therein for directing operation of a computer system including a processor and at least one input device, wherein the computer-readable program includes instructions for operating the computer system for designing a digital circuit in accordance with the following:
- receiving an expression of a logical structure to be implemented by the digital circuit from the at least one input device;
- representing the logical structure in terms of a plurality of logical operations with the processor, wherein the plurality of logical operations comprises at least 5% selection operations, each such selection operation passing at least one of a plurality of inputs as an output;
- and
- determining logic cells that correspond to an implementation of the logical operations with the processor.
Dependencies are inferred from the claim text.