Duty analysis system for a semiconductor integrated circuit and duty analysis method of the same
AssigneeKabushiki Kaisha Toshiba
InventorHideaki Murakami
Life of this patent
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Abstract
A system for analyzing a monolithic integrated circuit includes a logic circuit simulator configured to obtain a cell duty of a primitive cell configuring a logic circuit by performing a logic simulation of the logic circuit based on a netlist of the logic circuit and input vectors for the logic circuit, an analog circuit simulator configured to obtain a transistor duty of a transistor that configures a primitive cell by performing an analog simulation of the primitive cell based on a netlist of the analog circuit of the primitive cell and input vectors for the primitive cell, and a synthesis module configured to obtain a synthesized duty of a transistor of the logic circuit by performing a synthesis of the cell and transistor duties.
Claims16
A system for analyzing a monolithic integrated circuit, comprising:
- a logic circuit simulator configured to obtain a cell duty of a primitive cell configuring a logic circuit by performing a logic simulation of the logic circuit based on a netlist of the logic circuit and input vectors for the logic circuit;
- an analog circuit simulator configured to obtain a transistor duty of a transistor configuring the primitive cell by performing an analog simulation of the primitive cell based on a netlist in the analog circuit of the primitive cell and input vectors for the primitive cell;
- and
- a synthesis module configured to obtain a synthesized duty of the transistor of the logic circuit by performing a synthesis of the cell and transistor.
A method for analyzing a monolithic integrated circuit, comprising:
- obtaining a cell duty of a primitive cell configuring a logic circuit by performing a logic simulation of the logic circuit based on a netlist of the logic circuit and input vectors for the logic circuit;
- obtaining a transistor duty of a transistor configuring the primitive cell, by performing an analog simulation of the primitive cell based on a netlist of an analog circuit in the primitive cell and input vectors for the primitive cell;
- and
- obtaining a synthesized duty of a transistor of the logic circuit by performing a synthesis of the cell and transistor.
Dependencies are inferred from the claim text.