Forward error correction apparatus and methods
AssigneeLSI Logic Corporation
InventorTan C. Dadurian
Life of this patent
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AssigneeLSI Logic Corporation
InventorTan C. Dadurian
Estimating the term…
Forward error correction apparatus and methods are described. A forward errro correction method includes: (a) computing syndromes values; (b) computing an erasure location polynomial based upon one or more erasure locations; (c) computing modified syndromes based upon the computed erasure location polynomial and the computed syndrome values; (d) computing coefficients of an error location polynomial based upon the computed modified syndromes; (e) computing a composite error location polynomial based upon the computed coefficients of the error location polynomial; (f) computing a Chien polynomial based upon the computed composite error location polynomial; (g) performing a redundant Chien search on the computed composite error location polynomial to obtain error location values; and (h) evaluating the computed Chien polynomial based upon the error location values to obtain error and erasure values. A forward errro correction system includes: first and second simultaneously accessible memory locations; first, second and third register banks; and a micro-sequencer configured to choreograph a method of correcting errors and erases by coordinating the flow of data into the first and second memory locations and the first, second and third register banks.
A system of correcting errors and erasures, comprising:
Dependencies are inferred from the claim text.