Testing of circuit modules embedded in an integrated circuit

A system for testing one or more of multiple circuit modules embedded in an integrated circuit, comprising:

• a test controller for accepting serial data and control signals from outside the integrated circuit in accordance with a test protocol that corresponds to a board level test protocol, the controller including;
• a first selector for selecting one of the multiple circuit modules for testing, control signals being transmitted to only the selected one of the test modules;
• and
• a second selector for selecting output from the selected one of the circuit modules;
• and
• a boundary scan register corresponding to each of the one or more circuit modules, the boundary scan register providing input to circuit modules from the controller in a test mode and from an operating input when in operating mode.

A system for testing one or more of multiple circuit modules embedded in an integrated circuit, comprising:

• a test controller for accepting serial data and control signals from outside the integrated circuit, the test controller including logic for communicating with outside the integrated circuit using a clock line, a reset line, a test mode line, a data-in line, and a data-out line;
• one or more multiple boundary scan register, each boundary scan register corresponding to one of the circuit modules, each boundary scan register providing input to the corresponding circuit module from the test controller when the integrated circuit is in a test mode and from an operating input when in the integrates circuit is in an operating mode;
• and
• conductors for the test controller to communicate with the boundary scan registers, the conductors including a data-in line, a data-out line, a clock line, a mode line to indicate whether the integrated circuit module is in test mode or operating mode, an output data capture line indicating that output from the circuit module is to be captured, an input application line to indicate that input data in the boundary scan register is to be applied to the inputs of the circuit module.

A method of testing a circuit module embedded in an integrated circuit design, at least some of the pins of the circuit module not being directly connected to a pin of the larger design, test commands and data being communicated to the circuit module using five conductors including a clock conductor, a test mode conductor, a reset conductor, a data in conductor, and a data out conductor, the method comprising;

• scanning through the data in conductor commands and data into a scan chain associated with the inputs of the circuit module;
• applying the data in the scan chain as input to the circuit module;
• and
• retrieving through the data out conductor output of the circuit module through the scan chain to the test interface.