US 2003/0126524 A1 · Semiconductor storage unit

Abstract

In a chip with pads provided on four sides, I/O defects of the chip can be determined with test probes applied to two sides of the chip. A semiconductor storage unit has data pads which input/output data arranged on predetermined two sides, and control pads which input/output control data arranged on other two sides. The unit includes test circuits connected in series and connected to a corresponding data pads and has a register circuit. The register circuit holds and outputs inputted data based on a test signal. Storage elements stores data and are connected to a corresponding test circuit. At the time of testing, the elements store the data from a predetermined data pad and transmitted to a predetermined test circuit. The register circuit reads the data in the corresponding storage element and outputs the data from the predetermined data pad via other register circuit.

Claims13

Dependent claims

A semiconductor storage unit with a plurality of data pads which input and output data arranged on predetermined two sides and a plurality of control pads which input and output control data arranged on other two sides, comprising:

a plurality of test circuits connected in series, each of which is connected to a corresponding data pads of the plurality of data pads and has a register circuit which holds and outputs inputted data based on a test signal;
and
a plurality of storage elements, each of which stores data and is connected to a corresponding test circuit of the plurality of test circuits,
wherein at the time of testing the semiconductor storage unit, the plurality of storage elements store the data inputted from a predetermined data pad of the plurality of data pads and transmitted to a predetermined test circuit, and
wherein the register circuit reads the data stored in the corresponding storage element and outputs the data from the predetermined data pad via other register circuit of the plurality of test circuits connected in series.

2 more elements

A semiconductor storage unit comprising:

a plurality of data pads which are arranged on predetermined two sides and which input and output data;
a plurality of control pads which are arranged on other two sides different from the predetermined two sides and which input and output control data;
and a control circuit which controls operations of the semiconductor storage unit,
wherein the control circuit comprises an internal circuit, connected to at least one of the control pads, which operates the semiconductor storage unit based on the control signal applied to the control pad, power supply which supplies current, and a current generating circuit which feeds the current supplied from the power supply to at least one of the control pads when a test signal is of the test mode level.

1 more element

Dependencies are inferred from the claim text.

Semiconductor storage unit

Life of this patent

Semiconductor storage unit

Life of this patent

Abstract

Claims13