Method, apparatus, and system for high speed data transfer between electronic devices
AssigneeIntel Corporation
InventorsHenrik I. Johansen, Franz Olbrich, Sebastian Steibl, Andreas Schulten
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Abstract
According to one aspect of the invention, a method is provided in which a plurality of data signals are transmitted in parallel mode via a parallel bus from a first device to a second device. Phase information of each data signal received at the second device is detected against a corresponding clock signal. The phase information is sent from the second device to the first device. At the first device, an output delay of each data signal is adjusted based on the phase information received from the second device.
Claims30
An apparatus comprising:
- a first device to transmit a plurality of data signals in parallel mode;
- and
- a second device coupled to receive the plurality of data signals from the transmitter circuit,
- wherein the second device detects phase information of each data signal against a corresponding clock signal and feed back the phase information to the first device, the first device adjusts an output delay of each data signal based on the phase information fed back from the second device.
An apparatus comprising:
- a first device to transmit a plurality of data signals in parallel format;
- and
- a second device to receive the plurality of data signals from the first device,
- wherein the second device detects phase information of each data signal with respect to a corresponding clock signal and adjusts a delay of the respective data signal based on the phase information detected prior to sampling of the data signals.
A method comprising:
- transmitting a plurality of data signals in parallel mode from a first device to a second device over a first bus;
- detecting phase information of each data signal received at the second device against a corresponding clock signal;
- sending the phase information from the second device to the first device;
- and
- adjusting an output delay of each data signal at the first device based on the phase information received from the second device.
A method comprising:
- transmitting a plurality of data signals from a first device to a second device in parallel mode over a first bus;
- detecting, at the second device, phase information of each data signal with respect to a corresponding clock signal;
- and
- adjusting a delay of the respective data signal prior to sampling of the data signal at the second device.
A system comprising:
- a processor;
- a first component coupled to the processor;
- and
- a second component coupled to the first component, wherein the first component transmits data words to the second component in parallel mode, each data word including a plurality of data bits, wherein the second component detects phase information of each data bit relative to a corresponding clock signal and feeds back the phase information of each data bit to the first component, the first component adjusts an output delay of each data bit based on the phase information fed back from the second component.
A machine-readable medium comprising instructions which, when executed by a machine, cause the machine to perform operations including:
- transmitting a plurality of data signals in parallel mode from a first device to a second device over a first bus;
- detecting phase information of each data signal received at the second device against a corresponding clock signal;
- sending the phase information from the second device to the first device;
- and
- adjusting an output delay of each data signal at the first device based on the phase information received from the second device.
Dependencies are inferred from the claim text.