Digital throttle for multiple operating points
AssigneeIntel Corporation
InventorsJames S. Burns, Stefan Rusu, David J. Ayers, Edward T. Grochowski, Marsha Eng, Vivek Tiwari
Life of this patent
Estimating the term…
Abstract
A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline. The monitored activity is scaled according to the current operating point of the processor and a power state is determined from the scaled activity. If the power state reaches a first threshold, the operating point of the processor is adjusted and a new scaling factor is selected to determine the power state.
Claims30
A system comprising:
- an execution pipeline;
- a power delivery unit to provide power to the execution pipeline at a specified operating point;
- a digital throttle to estimate a power state, responsive to activity of the execution pipeline and the specified operating state, and to trigger a change in the operating state, responsive to the estimated power state reaching a first threshold.
An apparatus comprising:
- an execution pipeline including one or more units to execute an instruction at a current operating point;
- a gate unit to indicate an activity state for the one or more units;
- an activity monitor to estimate an activity level for the processor, responsive to the gate unit and the current operating point;
- and
- a throttle circuit to adjust the operating point, responsive to a power state determined from the estimated activity level reaching a first threshold.
A processor comprising:
- an execution pipeline;
- a clock gating circuit to control power delivery to one or more units of the execution pipeline;
- a monitor unit to estimate an activity level of the execution pipeline, responsive to a status signal from the clock gating circuit;
- a scaling unit to adjust the estimated activity level, responsive to an operating point of the processor;
- and
- a threshold comparator to determine if the scaled, estimated activity level meets a first threshold level.
A method for controlling power consumption in a processor comprising:
- monitoring activity states for pipeline units of the processor;
- estimating a power state for the processor using the monitored activity states and an operating point of the processor;
- comparing the estimated power state with a threshold value;
- and
- adjusting the operating point of the processor if the estimated power state exceeds the threshold value.
A computer system comprising:
- a memory system to store instructions for execution;
- an instruction execution pipeline including a plurality of units to execute the instructions;
- a power deliver system to deliver power to the execution pipeline at a current operating point;
- an activity monitor to estimate an activity level for the execution pipeline at the current operating point;
- and
- a throttle circuit to adjust the current operating point, responsive to a power state determined from the activity level falling outside a specified range.
Dependencies are inferred from the claim text.