Method and apparatus to execute instructions in a processor

An method comprising:

• writing a bit in one or more source locations, said bit to indicate the validity of the data in each of the one or more source locations;
• reading the bit to determine the validity of the data in the one or more source locations;
• writing a bit in a destination location, said bit to determine the validity of the data in the destination location based on the validity of the bit in the one or more source location;
• and
• re-scheduling an instruction for execution if the bit in the destination location indicates invalid data.

An apparatus comprising:

• means for writing a bit in one or more source locations, said bit to indicate the validity of the data in each of the one or more source locations;
• means for reading the bit to determine the validity of the data in the one or more source locations;
• means for writing a bit in a destination location, said bit to determine the validity of the data in the destination location based on the validity of the bits in the one or more source locations;
• and
• means for re-scheduling an instruction for execution if the bit in the destination location indicates invalid data.

A computer system comprising:

• a bus;
• a memory unit coupled to said bus;
• a processor to execute an instruction, said processor comprising at least one source register, each source register comprising a validity bit to indicate validity of data in the at least one source register;
• and
• a data validity circuit coupled to the at least one source register to determine the validity of the data in the at least one source register, said data validity circuit to indicate the validity of the data in a destination register, by writing a validity bit in the destination register based upon the validity of the data in the at least one source register.

An article of manufacture comprising:

• a machine-accessible medium including instructions that, when executed by a machine, causes the machine to perform operations comprising
• writing a bit in one or more source registers, said bit to indicate the validity of the data in each of the one or more source registers;
• reading the bit to determine the validity of the data in the one or more source registers;
• writing a bit in a destination register to determine the validity of the data in the destination register based on the validity of the bits in the one or more source registers;
• and
• re-scheduling an instruction for execution if the bit in the destination register indicates invalid data.