Processing partial register writes in an out-of order processor
OwnerEdward T. Grochowski, Jared W. Starkinventors
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Abstract
A method for processing registers in an out-of-order processor. A predicate in an instruction is predicted. An architecturally correct value is then computed using a read-modify-write operation. The predicted value is compared to the architecturally correct value. The instruction with an incorrectly-predicted predicate is flushed from the pipeline if the predicted value and the architecturally correct value are different.
Claims29
A method, comprising:
- substantially simultaneously reading values from a plurality of registers;
- parsing a particular instruction, and determining a select number of registers to be modified in the plurality of registers;
- modifying a subset of the values in the select number of registers;
- and
- substantially simultaneously writing the values to the plurality of registers.
A method, comprising:
- providing a prediction for a predicate in an instruction;
- setting a first set of values for selected predicate registers in a predicate register file according to the prediction;
- obtaining a second set of values which represents determined values for the predicate, the second set of values being computed by a read-modify-write operation;
- comparing the first set of values with the second set of values;
- and
- flushing an instruction with incorrectly predicted predicate and any dependent instructions from the pipeline if the first set of values are different from the second set of values.
A computer readable medium containing executable instructions which, when executed in a processing system, causes the system to perform a read-modify-write operation, comprising:
- substantially simultaneously reading values from a plurality of registers;
- parsing a particular instruction, and determining a select number of registers to be modified in the plurality of registers;
- modifying a subset of the values in the select number of registers;
- and
- substantially simultaneously writing the values to the plurality of registers.
A computer readable medium containing executable instructions which, when executed in a processing system, causes the system to process registers in an out-of-order processor, comprising:
- providing a prediction for a predicate in an instruction;
- setting a first set of values for selected predicate registers in a predicate register file according to the prediction;
- obtaining a second set of values which represents determined values for the predicate, the second set of values being computed by a read-modify-write operation;
- comparing the first set of values with the second set of values;
- and
- flushing an instruction with an incorrectly predicated predicate and any dependent instructions if the first set of values are different from the second set of values.
Dependencies are inferred from the claim text.