System and method of reducing the number of copies from alias registers to real registers in the commitment of instructions

A processor system comprising:

• a reorder buffer comprising a plurality of entries associated respectively with a plurality of instructions;
• an execution unit to execute a first instruction of said plurality of instructions which generates a first register value for a first real register, said execution causing said first register value to be stored in a first alias register identified in a first entry of said reorder buffer associated with said first instruction;
• and
• an allocator to add new instructions into said reorder buffer, said allocator determining whether said first register value should be copied from said first alias register to said first real register approximately at a time when said allocator determines that said first entry of said reorder buffer is needed for a second instruction that is younger in order than said first instruction.

A computer readable medium comprising one or more software modules to:

• generate a reorder buffer containing a plurality of entries associated respectively with a plurality of instructions;
• execute a first instruction of said plurality of instructions which generates a first register value for a first real register, said first register value being stored in a first alias register identified in a first entry of said reorder buffer associated with said first instruction;
• and
• determine whether said first register value should be copied from said first alias register to said first real register approximately at a time when said first entry of said reorder buffer is needed for a second instruction that is younger in order than said first instruction.

A method, comprising:

• providing a reorder buffer comprising a plurality of entries associated respectively with a plurality of instructions including a first entry associated with a first instruction, said first entry identifying a first alias register containing a first register value for a first real register;
• identifying said first entry of said reorder buffer to be associated with a second instruction that is younger in order than said first instruction;
• determining whether said first register value is valid for copying from said first alias register to said first real register;
• copying said first register value from said first alias register to said first real register if it is determined that said first register value is valid;
• and
• associating said first entry of said reorder buffer with said second instruction.

A processor system, comprising:

• a reorder buffer comprising a plurality of entries associated respectively with a plurality of instructions including a first entry associated with a first instruction, said first entry identifying a first alias register containing a first register value for a first real register;
• and
• an allocator to:
• identify said first entry of said reorder buffer to be associated with a second instruction that is younger in order than said first instruction;
• determine whether said first register value is valid for copying from said first alias register to said first real register;
• copy said first register value from said first alias register to said first real register if it is determined that said first register value is valid;
• and
• associate said first entry of said reorder buffer with said second instruction.

A computer readable medium comprising one or more software modules to:

• provide a reorder buffer comprising a plurality of entries associated respectively with a plurality of instructions including a first entry associated with a first instruction, said first entry identifying a first alias register containing a first register value for a first real register;
• identify said first entry of said reorder buffer to be associated with a second instruction that is younger in order than said first instruction;
• determine whether said first register value is valid for copying from said first alias register to said first real register;
• copy said first register value from said first alias register to said first real register if it is determined that said first register value is valid;
• and
• associate said first entry of said reorder buffer with said second instruction.