Stick and spoke replay

A method comprising:

• dispatching an instruction;
• speculatively executing said instruction;
• checking whether said instruction executing correctly;
• replaying said instruction if said instruction did not execute correctly, wherein said replaying comprises dynamically determining a time period to delay said instruction prior to re-execution;
• re-executing said instruction after said time period elapsed if said instruction did not execute correctly;
• and
• retiring said instruction if said instruction executed correctly.

A processor comprising:

• a scheduler to dispatch instructions;
• a multiplexor coupled to said scheduler, said multiplexor to receive said instructions from said scheduler;
• an execution unit coupled to said multiplexor, said execution unit to execute said instructions;
• a checker coupled to said execution unit, said checker to determine whether each instruction has executed correctly;
• and
• a replay mechanism coupled to said checker, said replay mechanism to receive from said checker each instruction that has not executed correctly, said replay mechanism further comprising logic to determine whether a long latency operation caused an incorrectly executed instruction, said logic also to dynamically determine a time period to delay said incorrectly executed instruction if said long latency operation caused said incorrectly executed instruction.

A system comprising:

• a memory coupled to a bus;
• a processor coupled to said bus, said processor comprising:
• a scheduler to dispatch instructions;
• an execution unit coupled to said scheduler, said execution unit to execute said instructions;
• a first level cache coupled to said execution unit, said first level cache to store data for said instructions;
• a checker coupled to said execution unit, said checker to determine whether each instruction has executed correctly;
• and
• a replay mechanism coupled to said checker, said replay mechanism to receive from said checker each incorrectly executed instruction, said replay mechanism further comprising logic to determine whether a long latency operation caused said incorrectly executed instruction, said logic to also dynamically determine a time period to delay said incorrectly executed instruction if said long latency operation caused said incorrectly executed instruction.