Data processing system, array-type processor, data processor, and information storage medium

A data processing system in which a plurality of data processors are connected in parallel, said data processors performing processing, in accordance with computer programs that have been set beforehand and event data that are received as input, of process data that have been received as input;

• said data processing system distributing said process data among said plurality of data processors and processing said process data;
• wherein:
• at least one of said plurality of data processors is constituted by an array-type processor, this array-type processor including:
• a data path unit in which a plurality of processor elements, which individually execute data processing in accordance with instruction codes that have been individually set, and a plurality of switch elements, which individually switch-control the connection relations of the plurality of said processor elements in accordance with instruction codes that have been individually set, are arranged in a matrix;
• and
• a state managing unit that successively switches contexts that are constituted by said instruction codes of said data path unit in accordance with said computer programs and said event data;
• at least a portion of process data that have been processed by other said data processors is transmitted to said data path unit of said array-type processor, and at least a portion of event data that have been issued by other said data processors in accordance with said data processing is transmitted to said state managing unit;
• and
• at least a portion of process data that have been processed at said data path unit of said array-type processor is transmitted to other said data processors.

A data processing system in which a plurality of data processors are connected in parallel, said data processors performing processing, in accordance with computer programs that have been set beforehand and event data that are received as input, of process data that have been received as input;

• said data processing system distributing said process data among said plurality of data processors and processing said process data;
• wherein:
• at least one of said plurality of data processors is constituted by an array-type processor, this array-type processor including:
• a data path unit in which a plurality of processor elements, which individually execute data processing in accordance with instruction codes that have been individually set, and a plurality of switch elements, which individually switch-control the connection relations of the plurality of said processor elements in accordance with instruction codes that have been individually set, are arranged in a matrix;
• and
• a state managing unit that successively switches contexts that are constituted by said instruction codes of said data path unit in accordance with said computer programs and said event data;
• at least a portion of process data that have been processed by other said data processors is transmitted to said data path unit of said array-type processor, and at least a portion of event data that have been issued by other said data processors in accordance with said data processing is transmitted to said state managing unit;
• and
• at least a portion of process data that have been processed at said data path unit of said array-type processor is transmitted to other said data processors, and at least a portion of event data that have been generated by said data path unit in accordance with data processing is transmitted to other said data processors.

A data processing system in which process data that have been received as input are distributed among a plurality of data processors that are connected in parallel and processed;

• wherein:
• at least one of said plurality of data processors is constituted by an array-type processor, this array-type processor including:
• a data path unit in which a plurality of processor elements, which individually execute data processing in accordance with instruction codes that have been individually set, and a plurality of switch elements, which individually switch-control the connection relations of said plurality of processor elements in accordance with instruction codes that have been individually set, are arranged in a matrix;
• a state managing unit that successively switches contexts that are constituted by said instruction codes of said data path unit in accordance with said computer programs;
• and
• a data memory for temporarily storing various data in a freely updateable state;
• and wherein said data memory is shared by said array-type processor and other said data processors.