Instruction sequences for suspending execution of a thread until a specified memory access occurs
OwnerShiv Kaushik, James B. Crossland +4inventors
InventorsShiv Kaushik, James B. Crossland, Deborah T. Marr, Dion Rodgers, David L. Hill, David A. Koufaty
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Abstract
Techniques for suspending execution of a thread until a specified memory access occurs. In one embodiment, a set of instructions executable by a machine may specify a monitor address, suspend a thread until a monitor break event occurs, and test whether the monitor break event is a write to the monitor address. If the monitor break event is not a write to the monitor address, then the thread is suspending again.
Claims30
An article comprising a machine readable medium storing instructions that, if executed by a machine, cause the machine to perform a plurality of operations comprising:
- specifying a monitor address;
- suspending a thread until a monitor break event occurs;
- testing whether the monitor break event is a write to the monitor address;
- if the monitor break event is not the write to the monitor address, then suspending the thread again.
An article comprising a machine readable medium storing instructions that, if executed by a machine, cause the machine to perform operations comprising:
- programming a monitor with a monitor address corresponding to a cache line of at least one work location;
- suspending a thread until a monitor break event occurs;
- testing whether the at least one work location indicates a first task is ready to execute;
- testing whether the at least one work location indicates a second task is ready to execute;
- if neither the first task nor the second task is ready to execute, then returning to suspending the thread.
A method comprising:
- specifying a monitor address;
- suspending a thread until a monitor break event occurs;
- testing whether the monitor break event is a write to the monitor address;
- if the monitor break event is the write to the monitor address, then suspending the thread again.
A system comprising:
- a processor;
- a monitor to generate a monitor break event in response to a memory access to a monitor address;
- event detect logic to detect an of a plurality of monitor break events;
- a memory to store a loop in a first thread executable by said processor to specify said monitor address and to repeatedly suspend said first thread after monitor break events until the memory access to the monitor address occurs.
A system comprising:
- a processor;
- a monitor;
- a memory to store an idle loop in a first thread executable by said processor to perform operations comprising:
- specifying a monitor address;
- suspending said first thread until a monitor break event occurs;
- testing whether the monitor break event is a write to the monitor address;
- if the monitor break event is not the write to the monitor address, then returning to specifying the monitor address.
A method comprising:
- executing a first instruction in a first thread that specifies a monitor address;
- executing a second instruction in said first thread to suspend said first thread until a write access implicating said monitor address or an interrupt occurs;
- executing a plurality of instructions in a second thread;
- after the write access or the interrupt occurs, testing whether a data element associated with said monitor address has changed;
- returning to executing the second instruction if the data element has not changed.
Dependencies are inferred from the claim text.