Method and apparatus for converting an external memory access into a local memory access in a processor core
AssigneeIntel Corporation
InventorsJuan G. Revilla, Minh D. Tran
Life of this patent
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Abstract
A processor may include a processor core, which interprets and executes instructions, and a system bus interface, which enables the processor to communicate with a system. The system bus interface may include a fill bus and a DMA bus. The system bus interface may include a bridge between the fill bus and the DMA bus which enables the system bus interface to re-route information placed on the fill bus onto the DMA bus and back into the core.
Claims28
A method comprising routing a memory access from a processor core back into the processor core through a bus interface coupled to the processor core.
Apparatus comprising:
- a processor core including
- a local memory including a local data memory and a local instruction memory,
- a first port coupled to the local data memory, and
- a second port coupled to the local data memory and the local instruction memory;
- and
- a bus interface including
- a first bus coupled to the first port,
- a second bus coupled to the second port,
- a bridge between the first bus and the second bus, and
- a multiplexing unit operative to switch between the second bus and the bridge to enable information placed onto the first bus to be re-routed into the second port.
An article comprising a machine-readable medium including machine-executable instructions, the instructions operative to cause a machine to route a memory access from a processor core back into the processor core through a bus interface coupled to the processor core.
A system comprising:
- a processor comprising
- a processor core including
- a local memory including a local data memory and a local instruction memory,
- a first port coupled to the local data memory, and
- a second port coupled to the local data memory and the local instruction memory;
- and
- a bus interface including
- a first bus coupled to the first port,
- a second bus coupled to the second port,
- a bridge between the first bus and the second bus, and
- a multiplexing unit operative to switch between the second bus and the bridge to enable information placed onto the first bus to be re-routed into the second port;
- and
- a USB (Universal Serial Bus) interface;
- and
- a system bus coupled to the processor and the USB interface.
Dependencies are inferred from the claim text.