Fast forwarding ALU

A memory comprising:

• a plurality of words, each word comprising:
• a plurality of data bits;
• and
• a flag bit indicating a predetermined number of most significant bits of the data bits are all zero, the predetermined number not being all of the data bits.

A pipelined circuit comprising:

• a memory with a plurality of words, each word comprising:
• a plurality of data bits;
• and
• a flag bit indicating a predetermined number of most significant bits of the data bits are all zero, the predetermined number not being all of the data bits;
• and
• an arithmetic logic unit (ALU) receiving contents of at least one of the words, the ALU using the flag bit within the received word to determine whether an upper portion of any input data can be forwarded.

An integrated circuit comprising a pipelined circuit for performing operations on a first binary number and a second binary number, the pipelined circuit comprising:

• a first arithmetic logic unit (ALU) operating on a first lower portion of the first binary number and a second lower portion of the second binary number to produce a first result and a carry out signal;
• and
• a second ALU operating on a first upper portion of the first binary number and a second upper portion of the second binary number to produce a second result;
• wherein at least one stage in the pipelined circuit stalls in response to the carry out signal.

A method of operating on a first binary number and a second binary number, comprising:

• adding a first lower portion of the first binary number and a second lower portion of the second binary number to produce a first result and a carry out signal;
• and
• adding a first upper portion of the first binary number and a second upper portion of the second binary number to produce a second result;
• generating a pipeline stall signal in response to the carry out signal.

A method of operating on binary numbers, comprising:

• generating a binary data value comprising a plurality of bits;
• generating a flag bit indicating a predetermined number of most significant bits of the data value are all zero, the predetermined number not being all of the data bits;
• storing the data value and the flag bit at a location within a memory;
• reading the stored data bits and the stored flag bit from the memory;
• and
• conditionally forwarding a portion of the read data value in response to the read flag bit.