High speed add-compare-select operations for use in viterbi decoders

Apparatus for performing add-compare-select operations in accordance with a Viterbi decoder, the apparatus comprising:

• at least one processor operative to:
• (i) respectively add input values of two or more sets of input values to generate sums for the two or more sets;
• (ii) substantially concurrent with the respective addition of the input values of the two or more sets of input values, compare the two or more sets of input values;
• and (iii) select one of the generated sums of the two or more input sets based on the comparison of the two or more sets of input values;
• and
• a memory, coupled to the at least one processor, for storing at least a portion of results associated with one or more of the add, compare, select operations.

A Viterbi decoder for performing an add-compare-select algorithm, the algorithm comprising the steps of:

• respectively adding input values of two or more sets of input values to generate sums for the two or more sets;
• substantially concurrent with the respective addition of the input values of the two or more sets of input values, comparing the two or more sets of input values;
• and
• selecting one of the generated sums of the two or more input sets based on the comparison of the two or more sets of input values.

An article of manufacture for performing add-compare-select operations in accordance with a Viterbi decoder, the article comprising a machine readable medium containing one or more programs which when executed implement the steps of:

• respectively adding input values of two or more sets of input values to generate sums for the two or more sets;
• substantially concurrent with the respective addition of the input values of the two or more sets of input values, comparing the two or more sets of input values;
• and
• selecting one of the generated sums of the two or more input sets based on the comparison of the two or more sets of input values.

An integrated circuit device, the integrated circuit device comprising a Viterbi decoder operable to:

• respectively add input values of two or more sets of input values to generate sums for the two or more sets;
• substantially concurrent with the respective addition of the input values of the two or more sets of input values, compare the two or more sets of input values;
• and
• select one of the generated sums of the two or more input sets based on the comparison of the two or more sets of input values.