Variable clocking in an embedded symmetric multiprocessor system
AssigneeTexas Instruments Incorporated
InventorSteven R. Jahnke
Life of this patent
Estimating the term…
Abstract
In multiprocessor systems the task of holding power dissipation to its lowest possible level is challenging. This invention permits reduced power dissipation by optionally clocking selected central processing units at lower frequencies if they are not fully loaded. The variable clocking system enables synchronization between central processing units operating a differing frequencies and shared memory and peripherals. This allows for significant power reduction in the frequently occurring scenario where all processors are not driven to their limits by prevailing system requirements.
Claims5
A data processing system comprising:
- an input reference clock signal;
- a plurality of central processing units;
- at least one peripheral device connected to each central processing unit;
- and
- a clock distribution system supplying a selected one of a plurality of clock frequency signals to each central processing unit and supplying a lowest clock frequency signal supplied to any central processing unit to said at least one peripheral device.
Dependencies are inferred from the claim text.