Processor and method of booting same

A semiconductor device having a first block arranged not to be powered off and a second block arranged to be powered on and off while the first block is powered on, comprising

• a boot ROM for storing programs that are to be read in boot process, table data of initial values, a first expected check-sum value that is a sum of data that forms the programs and the table data and is regarded as numeric values, and a second expected check-sum value that is a sum of data that forms the programs and is regarded as numeric values,
• a backup memory for saving table data that was processed before the second block was powered off last,
• a power-on determination circuit for determining whether the first block or the second block has been powered on, a read selection circuit for performing control so that programs, the table data and the first expected check-sum value will be read from the boot ROM, or programs and the second expected check-sum value will be read from the boot ROM and table data that was backed up when the power was turned off last will be read from the backup memory, depending on a result of determination by the power-on determination circuit,
• a first storage memory for storing the programs read by the read selection circuit,
• a second storage memory for storing the table data read by the read selection circuit, and
• a check-sum performing circuit for performing check-sum on the programs stored in the first storage memory and the table data stored in the second storage memory using the first expected check-sum value, or performing check-sum on the programs stored in the first storage memory using the second expected check-sum value.