Back to results
US 2003/0120910 A1Published application
System and method of remotely initializing a local processor
AssigneeIntel Corporation
InventorsMark A. Schmisseur, Timothy J. Jehl, Richard P. Mackey, Delf Atallah
Life of this patent
Estimating the term…
Abstract
A system and method of initializing a core processing circuit are disclosed. The core processing circuit is held in a reset state while a reset vector is loaded to one or more registers at a boot address associated with the core processing circuit. The reset vector is loaded from a system memory through a host bridge. The reset vector comprises one or more instructions to initialize the core processing system upon release from a reset state.
Claims35
A system comprising:
- a core processing circuit;
- and
- a host processing system coupled to the core processing system through a host bridge, the host processing system comprising:
- logic to place the core processing circuit in a reset state;
- and
- logic to load a reset vector to one or more registers at a boot address associated with the core processing circuit, the reset vector comprising one or more instructions to fetch addition instructions to initialize the core processing circuit upon release from the reset state.
3 more elements
A method comprising:
- placing a core processing circuit in a reset state;
- and
- loading a reset vector to one or more registers at a boot address associated with the core processing circuit, the reset vector comprising one or more instructions to fetch additional instructions from a system memory coupled to the core processing circuit through a host bridge of a host processing system.
A method comprising:
- placing a core processing circuit in a reset state;
- and
- loading instructions from a system memory of a host processing system to one or more registers at a boot address associated with the core processing circuit, the instructions comprising one or more instructions to initialize the core processing circuit upon release of the core processing circuit from the reset state.
An article comprising:
- a storage medium comprising machine-readable instructions encoded there on for:
- placing a core processing circuit in a reset state;
- and
- loading a reset vector to one or more registers at a boot address associated with the core processing circuit, the reset vector comprising one or more instructions to fetch additional instructions from a system memory coupled to the core processing circuit through a host bridge of a host processing system.
1 more element
An article comprising:
- a storage medium comprising machine-readable instructions encoded there on for:
- placing a core processing circuit in a reset state;
- and
- loading instructions from a system memory of a host processing system to one or more registers at a boot address associated with the core processing circuit, the instructions comprising one or more instructions to initialize the core processing circuit upon release from the reset state.
1 more element
Dependencies are inferred from the claim text.