Decompression bit processing with a general purpose alignment tool
AssigneeSun Microsystems, Inc.
InventorsSubramania Sudharsanan, Jeffrey Meng Wah Chan, Marc Tremblay
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AssigneeSun Microsystems, Inc.
InventorsSubramania Sudharsanan, Jeffrey Meng Wah Chan, Marc Tremblay
Estimating the term…
A method and apparatus for performing single-instruction bit field extraction and for counting a number of leading zeros in a sequence of bits on a general purpose processor are provided. The fast bit extraction operations are accomplished by executing a first instruction for extracting an arbitrary number of bits of a sequence of bits stored in two or more source registers of the processor starting at an arbitrary offset and the storing the extracted bits in a destination register. Both the source and the destination registers are specified by the instruction. In addition, a second instruction is provided for counting the number of leading zeros in a sequence of bits stored in two or more source registers of the processor and then storing a binary value representing the number of leading zeros in a destination register. Again the source and the destination registers are specified by the second instruction. Both the first and the second instructions are pipelined to obtain an effective throughput of one instruction every cycle, respectively. As a result, bit extraction operations are performed very efficiently by the processor, thereby reducing the overall processing time required to compress and decompress multimedia data.
A method of operating a processor comprising:
A processor comprising:
A processor comprising:
A processor that executes an instruction set that includes an instruction that upon execution thereof, causes the processor to count consecutive same-value encoding positions beginning at an arbitrary position in a set of one or more source registers identifiable using an operand of the instruction.
Dependencies are inferred from the claim text.