Memory system for increased bandwidth

A communications system component comprising:

• circuitry configured to receive data groups from and transmit data groups to one or more other components;
• first registers for holding received data groups prior to storage thereof;
• second registers for holding data groups read from the memory storage space prior to transmission to another component;
• and
• a memory system for storing received data groups with defined link lists, including:
• memory storage space comprising two or more addressable memory space allocations, each allocation capable of holding multiple separately addressable data groups, address circuitry to the allocations configured such that:
• the writing of a second data group to any one allocation immediately after the writing of a first data group to the same allocation would be subject to a pre-determinable access time delay;
• and
• the writing of a second data group to any one allocation immediately after the writing of a first data group to a different allocation, without any intervening write or read operations occurring between the writing of the first and second data groups to the memory storage space, is not subject to the full amount of said predetermined access time delay;
• and
• circuitry controlling read and write operations between the first registers, the memory storage space and the second registers, configured to require that whenever two sequential write operations on different data groups occur with no intervening read operations, each of the two data groups is addressed to a different memory space allocation.