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US 2003/0119224 A1Published application
Semiconductor package
AssigneeMicron Technology, Inc.
InventorDavid J. Corisis
Life of this patent
Estimating the term…
Abstract
A semiconductor package is provided which includes a semiconductor die which is formed in a die mounting area of a substrate. The die mounting area includes a frame with an opening formed therein, a die paddle, and a descending portion which connects the die paddle to the frame. The die mounting area forms a cavity to receive the semiconductor die such that an active surface of the semiconductor die is planar with the top surface of the substrate.
Claims22
A method for fabricating semiconductor packages, comprising:
- forming a leadframe with a plurality of downset portions;
- attaching semiconductor dies to said downset portions, each said semiconductor die including contact pads;
- attaching a tape to said leadframe and said dies, said tape including electrical traces;
- and
- electrically connecting said contact pads of said dies with said electrical traces of said tape.
2 more elements
A method for fabricating a semiconductor package, comprising:
- forming a substrate having a downset portion;
- attaching a semiconductor die to said downset portion, said semiconductor die including contact pads;
- attaching a tape to said substrate and said die, said tape including electrical traces;
- and
- electrically connecting said contact pad of said die with said electrical traces of said tape.
2 more elements
A semiconductor package, comprising:
- a substrate having a first surface;
- a downset portion extending from said substrate to form a cavity;
- a semiconductor die having contact areas and being attached to said downset portion within said cavity;
- and
- a tape including circuit traces attached to said first surface, said circuit traces of said tape being electrically connected to said contact areas of said semiconductor die.
2 more elements
Dependencies are inferred from the claim text.