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US 2003/0118120 A1Published application
Receiver with offset compensation
AssigneeInfineon Technologies AG
InventorsAndreas Menkhoff, Matthias Schoebinger
Life of this patent
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AssigneeInfineon Technologies AG
InventorsAndreas Menkhoff, Matthias Schoebinger
Estimating the term…
Receiver for receiving a received signal with a carrier frequency loop (18) which generates a carrier frequency deviation detection signal (TF) for detecting a carrier frequency of the received signal in a first carrier frequency capture range; a carrier phase loop (32) which generates a carrier phase deviation detection signal (TP) for detecting a carrier phase of the received signal, and settles when the carrier frequency deviation detection signal (TF) is within a second carrier frequency capture range; and with an offset control circuit (29) which changes the carrier frequency deviation detection signal (TF) and/or changes the second carrier frequency capture range by means of an offset control signal until a carrier phase lock detection circuit (21) indicates to the offset control circuit that the carrier phase offset of the received signal is less than an adjustable threshold value.
Receiver for receiving a received signal with:
Receiver according to one of the preceding claims, characterized in that the carrier frequency loop (18) has a carrier frequency detector (13), a first digital loop filter (15), a first controlled oscillator (17) and a first mixing stage (7).
Receiver according to one of the preceding claims, characterized in that the carrier phase loop (32) has a carrier phase detector (23), a second digital loop filter (25), a second controlled oscillator (31) and a second mixing stage (12).
Receiver according to one of the preceding claims, characterized in that a first matched filter (10a) for the in-phase signal component of the received QAM signal and a second matched filter (10b) for the quadrature signal component of the received QAM signal are provided between the first mixing stage (7) of the carrier frequency loop (18) and the second mixing stage (12) of the carrier phase loop (32).
Receiver according to one of the preceding claims, characterized in that the second mixing stage (12) is followed by the carrier phase lock detection circuit (21).
Receiver according to one of the preceding claims, characterized in that the offset control circuit (29) generates a carrier phase offset signal which is added to the carrier phase deviation detection signal (TP), filtered by the second digital loop filter (25) of the carrier phase loop (32), by an adder (27) for shifting the frequency of the carrier frequency capture range of the carrier phase loop (32).
Receiver according to one of the preceding claims, characterized in that the offset control circuit (29) generates a carrier frequency offset signal which is added to the carrier frequency deviation detection signal (TF), generated by the carrier frequency detector (13), by an adder (35) for compensating for a frequency offset of the received signal.
Dependencies are inferred from the claim text.