Back to results
US 2003/0117883 A1Published application
Apparatus for pipe latch control circuit in synchronous memory device
AssigneeHynix Semiconductor Inc.
InventorKwan-Weon Kim
Life of this patent
Estimating the term…
Abstract
An apparatus for a pipe latch control circuit controlled by a pipe output control signal in a synchronous memory device, comprising: a plurality of counting stages for counting in sequence in response to a data output buffer drive signal and a counting signal driver for generating the pipe output control signal by driving each counting signal, which is outputted from the plurality of counting stages and controlled by the data output buffer drive signal.
Claims9
An apparatus for a pipe latch control circuit controlled by a pipe output control signal in a synchronous memory device, comprising:
- a plurality of counting stages for counting in sequence in response to a data output buffer drive signal;
- and
- a counting signal drive means for generating the pipe output control signal by driving each counting signal outputted from the plurality of counting stages and controlled by the data output buffer drive signal.
Dependencies are inferred from the claim text.