Power-up signal generator for semiconductor memory devices

Abstract

A power-up signal generator for a semiconductor memory device that uses the deep power down power-up signal for a semiconductor element, which should be in a standby state in the deep power down entry, and the power-up signal for an initialization of another semiconductor elements in a DRAM device that operates after an internal power supply voltage is generated is disclosed. The generator also uses the power-up signal, which is disabled in the deep power down entry and enabled in a deep power down exit by the internal power supply voltage. The generator may include a power-up detector for generating a power-up detection signal by means of an external power supply voltage, a deep power down power-up signal generator for generating a deep power down power-up signal in response to the power-up detection signal, a power-up signal generator for generating a power-up signal in response to the power-up detection signal and power-up controller for determining whether or not enable the power-up signal in the deep power down entry.

Dependencies are inferred from the claim text.