Back to results
US 2003/0117865 A1Published application
Layer arrangement, memory cell, memory cell arrangement and method for producing a layer arrangement
AssigneeInfineon Technologies AG
InventorsFranz Hofmann, R. Johannes Luyken, Wolfgang Rosner
Life of this patent
Estimating the term…
Abstract
The invention relates to a layer arrangement, a memory cell, a memory cell arrangement and a method for producing a layer arrangement. The layer arrangement has a monocrystalline substrate, a highly doped region in the substrate and a metallically conductive structure in the highly doped region, a partial region of the highly doped region that is arranged in a surface region of the substrate being monocrystalline.
Claims21
A layer arrangement
- having a monocrystalline substrate;
- having a highly doped region in the substrate;
- having a metallically conductive structure as buried interconnect in the highly doped region;
- a partial region of the highly doped region that is arranged in a surface region of the substrate being monocrystalline.
1 more element
A method for producing a layer arrangement, in which
- a highly doped region is formed in a monocrystalline substrate;
- a metallically conductive structure is formed as buried interconnect in the highly doped region in such a way that a partial region of the highly doped region that is arranged in a surface region of the substrate is monocrystalline.
Dependencies are inferred from the claim text.