EEPROM cells and array with reduced write disturbance
AssigneeWinbond Electronics Corp.
InventorLoc B. Hoang
Life of this patent
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Abstract
A flash electrically-erasable, programmable read-only memory (EEPROM) having multiple source lines and source line select transistors. Each group of memory cells in the EEPROM is associated with one of the source line select transistors. Each source line is associated with more than one group of memory cells. When one group of memory cells is to be programmed, a relatively high voltage is coupled to its corresponding source line. Its corresponding source line select transistor then couples the source line to the group of memory cells to be programmed. In this manner, only the group to be programmed is exposed to the high voltage. This decreases the amount of high voltage stress placed on the other memory cells and increases the reliability and lifetime of the EEPROM.
Claims25
A flash electrically-erasable, programmable read-only memory (EEPROM), comprising:
- a plurality of groups of memory cells configured to store information;
- one or more source lines coupled to selectively provide a source voltage;
- and
- a plurality of source select transistors configured to selectively couple said one or more source lines to a selected one or more of said plurality of groups of memory cells to provide said source voltage thereto in accordance with a programming operation thereof.
A method of erasing a flash electrically-erasable, programmable read-only memory (EEPROM) having a plurality of memory cells and one or more source lines, comprising the acts of:
- selectively providing a source voltage to said one or more source lines;
- selectively coupling said one or more source lines to a selected one or more of said plurality of groups of memory cells to provide said source voltage thereto in accordance with a programming operation thereof.
A flash electrically-erasable, programmable read-only memory (EEPROM), comprising:
- a plurality of groups of memory cells configured to store information;
- one or more source lines coupled to selectively provide a source voltage;
- and
- means for selectively coupling said one or more source lines to a selected one or more of said plurality of groups of memory cells to provide said source voltage thereto in accordance with a programming operation thereof.
Dependencies are inferred from the claim text.