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US 2003/0117835 A1Published application
Magnetic random access memory
AssigneeHynix Semiconductor Inc.
InventorsChang Shuk Kim, Hyeok Je Jeong
Life of this patent
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Abstract
A magnetic random access memory includes a plurality of multi-layered memory structures that are formed within a single memory unit and connected in one of a series and a parallel configuration. Each of the plurality of multi-layered memory structures has a resistance that varies based on a magnetization direction of a ferromagnetic layer. A transistor is operatively coupled to each of the plurality of multi-layered memory structures to perform one of a memory read and a memory write operation based on a conduction state of the transistor.
Claims24
A magnetic random access memory, comprising:
- a plurality of resistance transfer devices connected in one of a series and a parallel configuration to store multi-level data.
A magnetic random access memory, comprising:
- a semiconductor substrate;
- source and drain junction regions positioned in an active region of the semiconductor substrate;
- a stacked structure of a gate oxide film and a word line formed on a channel region between the source and drain junction regions;
- a reference voltage line connected to the source junction region;
- a seed layer having a first side connected to the drain junction region;
- a first resistance transfer device cell formed at an upper portion of a second side of the seed layer;
- a second resistance transfer device cell formed on the seed layer between the first side of the seed layer and the first resistance transfer device cell;
- a first write line and a second write line respectively formed at a lower portion of the seed layer below the first resistance transfer device cell and the second resistance transfer device cell;
- and
- a bit line contacting the first resistance transfer device cell and the second resistance transfer device cell.
7 more elements
A magnetic random access memory, comprising:
- source and drain junction regions positioned in an active region of a semiconductor substrate;
- a stacked structure of a gate oxide film and a word line formed on a channel region between the source and drain junction regions;
- a reference voltage line connected to the source junction region;
- a first seed layer having a first side connected to the drain junction region;
- a first resistance transfer device cell formed at an upper portion of a second side of the first seed layer;
- a first write line formed at a lower portion of the second side of the first seed layer;
- a bit line connected to the first resistance transfer device cell;
- a second resistance transfer device cell formed at an upper portion of the first resistance transfer device cell on the bit line;
- a second seed layer having a first side connected to the first seed layer and a second side connected to an upper portion of the second resistance transfer device cell;
- and
- a second write line formed at the upper portion of the second side of the second seed layer.
8 more elements
A magnetic random access memory, comprising:
- source and drain junction regions positioned in an active region of a semiconductor substrate;
- a stacked structure of a gate oxide film and a word line formed on a channel region between the source and drain junction regions;
- a reference voltage line connected to the source junction region;
- a first seed layer having a first side connected to the drain junction region;
- a first resistance transfer device cell formed at an upper portion of a second side of the first seed layer;
- a first write line formed at a lower portion of the second side of the first seed layer;
- a first bit line connected to the first resistance transfer device cell;
- a second seed layer having a first side connected to the first seed layer on the first bit line;
- a second write line formed at a lower portion of a second side of the second seed layer;
- a second resistance transfer device cell formed at an upper portion of the second seed layer on the second write line;
- and
- a second bit line connected to the second resistance transfer device cell.
9 more elements
A magnetic random access memory, comprising:
- source and drain junction regions positioned in an active region of a semiconductor substrate;
- a stacked structure of a gate oxide film and a word line formed on a channel region between the source and drain junction regions;
- a reference voltage line connected to the source junction region;
- a seed layer having a first side connected to the drain junction region;
- a first resistance transfer device cell formed at an upper portion of a second side of the seed layer;
- a second resistance transfer device cell formed on the seed layer between the first side of the seed layer and the first resistance transfer device cell;
- a first write line and a second write line respectively formed at a lower portion of the seed layer below the first resistance transfer device cell and the second resistance transfer device cell;
- and
- a first bit line and a second bit line respectively contacting the first resistance transfer device cell and the second resistance transfer device cell.
6 more elements
A magnetic random access memory, comprising:
- source and drain junction regions positioned in an active region of a semiconductor substrate;
- a stacked structure of a gate oxide film and a word line formed on a channel region between the source and drain junction regions;
- a reference voltage line connected to the source junction region;
- a first seed layer having a first side connected to the drain junction region;
- a first resistance transfer device cell formed at an upper portion of a second side of the first seed layer;
- a first write line formed at a lower portion of the second side of the first seed layer;
- a first bit line connected to the first resistance transfer device cell;
- a second seed layer having a first side connected to the upper portion of the first bit line;
- a second write line formed at a lower portion of a second side of the second seed layer;
- a second resistance transfer device cell formed at an upper portion of the second seed layer on the second write line;
- and
- a second bit line connected to the second resistance transfer device cell.
9 more elements
A magnetic random access memory, comprising:
- source and drain junction regions positioned in an active region of a semiconductor substrate;
- a stacked structure of a gate oxide film and a word line formed on a channel region between the source and drain junction regions;
- a reference voltage line connected to the source junction region;
- a first seed layer having a first side connected to the drain junction region;
- a first resistance transfer device cell formed at an upper portion of a second side of the first seed layer;
- a first write line formed at a lower portion of the second side of the first seed layer;
- a first bit line connected to the first resistance transfer device cell;
- a second resistance transfer device cell formed at an upper portion of the first resistance transfer device cell on the first bit line;
- and
- a second bit line connected to the second resistance transfer device cell.
7 more elements
A magnetic random access memory, comprising:
- a plurality of multi-layered memory structures formed within a single memory unit and connected in one of a series and a parallel configuration, wherein each of the plurality of multi-layered memory structures has a resistance that varies based on a magnetization direction of a ferromagnetic layer;
- and
- a transistor operatively coupled to each of the plurality of multi-layered memory structures to perform one of a memory read and a memory write operation based on a conduction state of the transistor.
Dependencies are inferred from the claim text.