Voltage-controlled variable duty-cycle oscillator

An integrated circuit (IC) chip comprising:

• a voltage-controlled variable duty-cycle oscillator system coupleable to a source of operating potential Vcc, including:
• a reference current generator in current-mirror configuration providing a current Iref;
• a first one-shot comprising a first and second pair of series-coupled MOS transistors and a first timing capacitor coupled to be charged or discharged by a common node in said first pair of transistors, charging being to a voltage proportional to said Vcc and discharge being at a current rate proportional to said Iref;
• a second one-shot comprising a third and a fourth pair of series-coupled MOS transistors and a second timing capacitor coupled to be charged or discharged by a common node in said third pair of transistors, charge being to a voltage proportional to said Vcc and discharge being at a current rate proportional to said Iref;
• a first logic unit combining an output signal from a common node of said second pair of transistors in said first one-shot, and an output signal from a common node of said fourth pair of transistors in said second one-shot, and outputting an intermediate voltage controlled signal OSCint;
• a third one-shot comprising a fifth and a sixth pair of series-coupled MOS transistors and a third timing capacitor coupled to be charged or discharged by a common node in said fifth pair of transistors, charge being to a voltage proportional to a control voltage Vcon, and discharge being at a current rate proportional to said Iref;
• and
• a second logic unit combining said signal OSCint with an output signal from a common node of said sixth pair of series-coupled MOS transistors to yield an output signal VCOout;
• said output signal VCOout having a duty cycle proportional to magnitude of said control voltage Vcon;
• wherein each of said MOS transistors has a same threshold voltage Vth;
• and
• wherein maximum duty cycle of said output signal VCOout is determinable by a ratio of said third timing capacitor divided by a sum of said first timing capacitor and said second timing capacitor.

A method of varying duty cycle in a voltage controlled variable duty cycle oscillator that is coupleable to a source of operating potential Vcc, comprising the following steps:

• mirror-generating a reference current Iref;
• providing a first one-shot function whose time-out duration is proportional to said Iref and to a first timing capacitor prechargeable to a voltage proportional to said Vcc;
• providing a second one-shot function whose time-out duration is proportional to said Iref and to a second timing capacitor prechargeable to a voltage proportional to said Vcc;
• logically combining an output from said first one-shot function and from said second one-shot function to obtain an intermediate voltage controlled signal OSCint;
• providing a third one-shot function whose time-out duration is proportional to said Iref and to a third timing capacitor prechargeable to a control signal Vcon;
• logically combining said signal OSCint with an output signal from said third one-shot function to yield an output signal VCOout having at least one characteristic selected from a group consisting of (i) a duty cycle proportional to magnitude of said control voltage Vcon, and (ii) a maximum duty cycle determinable by a ratio of said third timing capacitor divided by a sum of said first timing capacitor and said second timing capacitor;
• and
• wherein magnitude of said control signal Vcon controls duty cycle of said output signal VCOout linearly within about 0.2%.