US 2003/0117180 A1Published application

Frequency multiplying circuitry with a duty ratio varying little

AssigneeOki Electric Industry Co., Ltd.

InventorKouji Nasu

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Abstract

Frequency multiplying circuitry includes a couple of integrator circuits. The one integrator circuit charges a capacitor with a larger time constant via a resistor when an input clock signal is in its high level and then discharges it with a smaller time constant when the clock signal is in its low level. The other integrator circuit charges and discharges its capacitor in the opposite manner to the one integrator circuit as to the level of the clock signal. An output circuit compares the output voltages of both integrator circuits with a reference voltage and raises the level of its output signal when either one of the output voltages drops below the reference voltage. The duty ratio of the circuitry is therefore little susceptible to the frequency of the input signal and power supply voltage.

Claims21

Dependent claims

Frequency multiplying circuitry for multiplying a frequency of an input signal having a first logical level and a second logical level, different from the first logical level, alternating with each other at a preselected period, comprising:

a first charging and discharging circuit for charging a first capacitance with a first time constant representative of a relaxation time, which is based on a transient response of an electric circuit, in response to the first logical level of the input signal and then discharging said first capacitance with a second time constant smaller than the first time constant;
a second charging and discharging circuit for charging a second capacitance with the first time constant in response to the second logical level of the input signal and then discharging said second capacitance with the second time constant in response to the first logical level of the input signal;
an output circuit for comparing an output voltage of said first charging and discharging circuit and an output voltage of said second charging and discharging circuit with a reference voltage and raising a level of an output signal when either one of the output voltages of said first charging and discharging circuit and said second charging and discharging circuit drops below the reference voltage;
and
a controller for controlling charging and discharging of said first charging and discharging circuit and said second charging and discharging circuit in response to the input signal and the output signal.

2 more elements

Frequency multiplying circuit comprising a first charging and discharging circuit and a second charging and discharging circuit;

said first charging and discharging circuit comprising:
a pair of a first selector and a second selector and a pair of a third selector and a fourth selector operating complementarily to each other in response to control signals each having a particular level different from each other;
a first capacitance circuit intervening between a first signal line connecting said first selector and said second selector and a second signal line connecting said third selector and said fourth selector;
a feed potential line for applying a power supply voltage to said first selector;
a reference potential line for applying a first reference potential to said third selector;
a first resistor intervening between a first reference potential terminal of said second selector and a second reference potential;
and
a second resistor intervening between a second reference potential terminal of said fourth selector and the second reference potential and having a higher resistance than said first resistor;
said first selector and said fourth selector each becoming active when a respective control signal is in a first logical level, said second selector and said third selector each becoming active when a respective control signal is in a second logical level different from the first logical level;
said second charging and discharging circuit comprising:
a pair of a fifth selector and a sixth selector and a pair of a seventh selector and an eighth selector operating complementarily to each other in response to control signals each having a particular level different from each other;
a second capacitance circuit intervening between a third signal line connecting said fifth selector and said sixth selector and a fourth signal line connecting said seventh selector and said eighth selector;
a feed potential line for applying the power supply voltage to said fifth selector;
a reference potential line for applying the first reference potential to said seventh selector;
a third resistor intervening between a third reference potential terminal of said sixth selector and the second reference potential;
and
a fourth resistor intervening between a fourth reference potential terminal of said eighth selector and the second reference potential and having a higher resistance than said third resistor;
said fifth selector and said eighth selector each becoming active when a respective control signal is in the first logical level, said sixth selector and said seventh selector each becoming active when a respective control signal is in the second logical level;
said frequency multiplying circuit further comprising:
an output circuit for comparing voltages output from said first charging and discharging circuit and said second charging and discharging circuit with the first reference potential and outputting a high level as an output signal when either one of the voltages drops below the first reference potential;
and
a controller for feeding the control signals to said first charging and discharging circuit and said second charging and discharging circuit in response to the input signal and the output signal.

19 more elements

Dependencies are inferred from the claim text.