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AssigneeNEC Electronics Corporation
InventorsKenji Yamamoto, Masaharu Mizuno, Kazuhiro Nakajima
Estimating the term…
A universal logic module that may have a reduced off-leak current in universal logic cells (100) not used as logic circuits has been disclosed. A universal logic module may include universal logic cells (100) that may be formed with a second wiring for connecting universal logic cells (100) from a base configuration formed with a first wiring. Unused universal logic cell (100) may include transistors in basic cells (A to E) that are non-connected to a power supply (VDD) and/or a ground potential (VSS). Furthermore, unused universal logic cell (100) may include transistors in basic cells (A to E) that may provide a capacitor between a power supply (VDD) and a ground potential (VSS). In this way, off-leak current may be reduced and noise on a power line and/or a ground line may be reduced.
A universal logic module forming an application specific integrated circuit (ASIC), comprising:
An application specific integrated circuit (ASIC) manufacturing method, comprising the steps of:
An ASIC designing method for designing an ASIC formed to include a universal logic module in which logic circuits are formed by a second wiring formed on a base configuration to provide a connection between at least two of a plurality of universal logic cells and in the base configuration, the plurality of universal logic cells are in the form of an array and at least partially connected with a first wiring, the ASIC designing method may comprising the steps of:
A method for providing an ASIC to a user, comprising the steps of:
Dependencies are inferred from the claim text.