Testing apparatus and method of measuring operation timing of semiconductor device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorYasumasa Nishimura
Life of this patent
Estimating the term…
Loading patent…
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorYasumasa Nishimura
Estimating the term…
A testing apparatus and method which can easily measure and evaluate, on a tester, transistor characteristics of a wafer of the same lot or wafer, and can measure high-speed operation timing in a high precision. The testing apparatus comprises measuring means 20 for measuring transistor characteristics of a circuit for transistor characteristics extraction that is formed in advance and belongs to the same lot or wafer as a lot or wafer of a subject semiconductor device, storage means 13 for storing measurement values of the measuring means as parameters, circuit simulation means 30 for performing a circuit simulation on a measurement system using the parameters stored in the storage means, and for storing resulting operation timing in the storage means, actual measurement means 12 for actually measuring operation timing of the subject semiconductor device, and for comparing a resulting actual measurement value with the operation timing that is obtained by the circuit simulation and is stored in the storage means, and a CPU 11 for controlling of the above means.
A testing apparatus for measuring operation timing of a semiconductor device, comprising:
A testing method of measuring operation timing of a semiconductor device, comprising the steps of:
Dependencies are inferred from the claim text.