US 2003/0117151 A1 · Semiconductor device and method of checking semiconductor storage device

Abstract

It is an object to obtain a semiconductor device having a circuit for CBCM (Charge Based Capacitance Measurement) which can measure a capacitance value with high precision. An MOS transistor constituting a circuit for CBCM has the following structure. More specifically, source-drain regions (4) and (4′) are selectively formed in a surface of a body region (16), and extension regions (5) and (5′) are extended from tip portions of the source-drain regions (4) and (4′) opposed to each other, respectively. A gate insulating film 7 is formed between the source-drain regions (4) and (4′) including the extension regions (5) and (5′) and a gate electrode (8) is formed on the gate insulating film (7). A region corresponding to a pocket region 6 (6′) in a conventional structure having a higher impurity concentration than that of a channel region is not formed in a tip portion of the extension region 5 (5′) and a peripheral portion of the extension region (5).

Claims19

Dependent claims

A semiconductor device having an insulated gate type transistor formed in a semiconductor substrate and constituting a circuit for CBCM (Charge Based Capacitance Measurement),

said insulated gate type transistor comprising:
a gate insulating film formed selectively on said semiconductor substrate;
a gate electrode formed on said gate insulating film;
and
a source-drain region of a second conductivity type which is formed to interpose therebetween a body region of a first conductivity type provided under said gate electrode in a surface of said semiconductor substrate, wherein
said body region has an impurity concentration in a vicinal region of said source-drain region which is equal to that in a non-vicinal region.

3 more elements

A semiconductor device having a first insulated gate type transistor of a first conductivity type, a second insulated gate type transistor of a second conductivity type and a capacitance for a test which are formed in a semiconductor substrate and constitute a circuit for CBCM, wherein

said first insulated gate type transistor has one electrode connected to a first power supply and the other electrode connected to said capacitance for a test, and is brought into an ON state for a charging period, thereby charging said capacitance for a test by means of said first power supply, and
said second insulated gate type transistor has one electrode connected to a second power supply and the other electrode connected to said capacitance for a test, and is brought into an ON state for a discharging period, thereby discharging said capacitance for a test by means of said second power supply,
said semiconductor device further comprising:
a power supply connection switching portion for electrically connecting said first power supply to one electrode of said first insulated gate type transistor only for said charging period and a vicinal period thereof and for electrically connecting said second power supply to one electrode of said second insulated gate type transistor only for said discharging period and a vicinal period thereof.

1 more element

Dependencies are inferred from the claim text.

Semiconductor device and method of checking semiconductor storage device

Life of this patent

Semiconductor device and method of checking semiconductor storage device

Life of this patent

Abstract

Claims19