Gated electron emitter having supported gate
AssigneeTrepton Research Group, Inc.
InventorsRandolph D. Schueller, Charlie C. Hong, Susan Hong
Life of this patent
Estimating the term…
Abstract
A field emission device having emitter tips and a support layer for a gate electrode is provided. Openings in the support layer and the gate layer are sized to provide mechanical support for the gate electrode. Cavities may be formed and mechanically supported by walls between cavities or columns within a cavity. Dielectric layers having openings of different sizes between the emission tips and the gate electrode can decrease leakage current between emitter tips and the gate layer. The emitter tips may comprise a carbon-based material. The device can be formed using processing operations similar to those used in conventional semiconductor device manufacturing.
Claims24
An apparatus for emitting electrons, comprising:
- (a) a substrate having an emission side;
- (b) a plurality of emitter tips protruding from the emission side of the substrate;
- (c) a selected portion of a first dielectric layer contacting the emission side of the substrate between the emitter tips, each emitter tip being contiguous with an opening in the first dielectric layer;
- (d) a dielectric support layer contacting the selected portion of the first dielectric layer, the opening in the first dielectric layer being contiguous with an opening in the dielectric support layer, the opening in the dielectric support layer having a size;
- and
- (e) a gate layer contacting the dielectric support layer, the opening in the dielectric support layer being contiguous with an opening in the gate layer, the opening in the gate layer having a size, wherein the size of the opening in the gate layer is equal to or greater than the size of the opening in the dielectric support layer.
An apparatus for emitting electrons, comprising:
- (a) a substrate having an emission side;
- (b) a plurality of emitter tips protruding from the emission side of the substrate;
- (c) a selected portion of a first etch layer contacting the emission side of the substrate between the plurality of emitter tips, each emitter tip being contiguous with an opening in the first etch layer;
- (d) a first intermediate dielectric layer contacting the selected portion of the first etch layer, the opening in the first etch layer being contiguous with an opening in the first intermediate dielectric layer;
- (e) a selected portion of a second intermediate dielectric layer contacting the first intermediate dielectric layer, the opening in the first intermediate dielectric support layer being contiguous with an opening in the second intermediate dielectric layer;
- (f) a dielectric support layer contacting the selected portion of the second intermediate dielectric layer, the opening in the second intermediate dielectric layer being contiguous with an opening in the dielectric support layer, the opening in the dielectric support layer having a size;
- and
- (g) a gate layer contacting the dielectric support layer, the opening in the dielectric support layer being contiguous with an opening in the gate layer, the opening in the gate layer having a size, wherein the size of the opening in the gate layer is as large or larger than the opening in the dielectric support layer.
A method for manufacturing an apparatus for emitting electrons, comprising:
- (a) providing a plurality of emitter tips protruding from an emitter material;
- (b) depositing a first dielectric layer on the plurality of emitter tips and the emitter material, the first dielectric layer being composed of a dielectric material having an etch reactivity;
- (c) depositing a dielectric support layer on the first dielectric layer, wherein the dielectric support layer is composed of a dielectric material having a different etch reactivity than the etch reactivity of the first dielectric layer;
- (d) depositing a gate layer on the dielectric support layer;
- (e) spinning a photoresist layer on the gate layer and etching the photoresist layer to form an exposed portion of the gate layer over each emitter tip;
- (f) etching the exposed portion of the gate layer to form a selected size of an opening in the gate layer and exposing a portion of the dielectric support layer over the emitter tip;
- (g) etching the exposed portion of the dielectric support layer to form a selected size of an opening in the dielectric support layer and exposing a portion of the first dielectric layer over the emitter tip;
- and
- (h) etching the exposed portion of the first dielectric layer to expose one or more emitter tips.
A method for manufacturing an apparatus for emitting electrons, comprising:
- (a) providing a plurality of emitter tips protruding from an emitter material;
- (b) depositing a first etch layer on the plurality of emitter tips and the emitter material;
- (c) depositing a first intermediate dielectric layer on the first etch layer, the first intermediate dielectric layer having an etch reactivity;
- (d) depositing a second intermediate dielectric layer on the first intermediate dielectric layer, wherein the second intermediate dielectric support layer is composed of a dielectric material having a different etch reactivity than the etch reactivity of the first intermediate dielectric layer;
- (e) depositing a support layer on the second intermediate dielectric layer;
- (f) depositing a gate layer on the support layer;
- (g) spinning a photoresist layer on the gate layer and etching the photoresist layer to form a selected size of an opening in the gate layer and exposing a portion of the support layer over each emitter tip;
- (h) etching the exposed portion of the support layer to form a selected size of an opening in the support layer and exposing a portion of the second intermediate dielectric layer over the emitter tip, the selected size of the opening in the gate layer being as large or larger than the opening in the support layer;
- (i) etching the exposed portion of the second intermediate dielectric layer to form an exposed portion of the first intermediate dielectric layer over the emitter tip;
- (j) etching the exposed portion of the first intermediate dielectric layer to form an exposed portion of the first etch layer;
- and
- (k) etching the exposed portion of the first etch layer to expose one or more emitter tips.
Dependencies are inferred from the claim text.